It’s becoming easier to imagine Samsung Electronics (005930.KS) as a one-stop shop, ready to serve the coming artificial intelligence semiconductor boom. Earnings guidance released by the company on Tuesday shows losses at the South Korean giant’s memory chip unit are narrowing. The recovery should focus on how the $390 billion cumulative may soon gain an edge over AI-chip leader TSMC (2330. TW).
Samsung’s operating profit for the last quarter of 2023 likely dropped by 35% compared to the same period in the previous year, totaling 2.8 trillion won ($2.1 billion). However, this marks a significant improvement from the previous quarter’s 78% annual decline. The demand and supply dynamics of DRAM data-storage chip cuts and increasing demand are primarily responsible for the positive shift. City analysts estimate that the average selling price of these chips will rise by up to 50% this year.
This positions Samsung strategically for significant strides in AI, an arena where Taiwan’s TSMC currently excels in crafting state-of-the-art logic chips crucial for data processing, catering to major clients like the $1.3 trillion Nvidia (NVDA.O.). Despite longstanding endeavors by the South Korean conglomerate, led by scion Jay Y. Lee, to diversify into microprocessor manufacturing, it has struggled to challenge TSMC’s dominance.
However, a shift may be imminent. High-performance semiconductors are imperative for AI applications, efficiently managing vast amounts of data. The challenge lies in the escalating cost and complexity of cramming more transistors onto a single silicon piece. Consequently, packaging, traditionally considered a low-tech process involving bundling chips into a container, is now gaining paramount importance for manufacturers specializing in advanced semiconductors.
TSMC has been a pioneer in packing technology, placing logic and memory chips closely together. Samsung is now strengthening both its logic-chip manufacturing and packaging capabilities. The company introduced Samsung Advanced Interconnection Technology (SAINT) last year, a 3D packaging technology that stacks chips vertically on top of each other. In contrast, TSMC’s 2.5D packaging places chips next to each other. Factors such as the distance between chips and the materials used for connections play a crucial role in these advancements.
Lee’s vision is that his company can produce both types of chips at scale for customers and package them all together in a better, and perhaps cheaper, way.
